مقالههای M.R Hashemi
توجه: محتویات این صفحه به صورت خودکار پردازش شده و مقالههای نویسندگانی با تشابه اسمی، همگی در بخش یکسان نمایش داده میشوند.
۱A Multi–Path Packet Routing Strategy with Dynamic Routing Tables for High–Performance Network–on–Chips
اطلاعات انتشار: شانزدهیمن کنفرانس مهندسی برق ایران، سال ۱۳۸۷
تعداد صفحات: ۷
System–On–Chip (SoC) designs provide a new integrated solution for designers to implement a complex system and accommodate the strict time to market and cost constraints. Communication is typically a major challenge in any large SoC system. Network– On–Chip (NoC) is a new paradigm to address the communication problem. On–chip networks for future system on chips need simple and high–performance implementation in order to satisfy the needs of those systems. Routers are one of the elements in the network which transfer data between cores. In this paper a dynamic multipath routing strategy is introduced. In the designed routers a dynamic scoring mechanism updates the routing table dynamically during network operation. Tables are updated according to the network status. The introduced router can be configured to use each of Store–and–Forward (SF), Virtual Cut–Through (VCT), and Worm–Hole (WH) schemes to route the packets. Two versions of each router have been implemented and have been synthesized on a Xilinx Virtex5 FPGA. Simulation results indicate that these routers improve the throughput by 10% while the occupied area is increased by around 25% compared to routers with fix and static routing tables.<\div>
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