۱A Study of Modeling and Simulation for Interleaved Buck Converter
اطلاعات انتشار: اولین کنفرانس بین المللی الکترونیک قدرت و سیستم های درایو، سال
تعداد صفحات: ۸
This paper focuses on modeling, analysis and simulation of a 42V\14V dc\dc converter based architecture. This architecture is considered to be a technically viable solution for automotive dual–voltage power system in passenger cars of the near future. An interleaved dc\dc converter system is chosen for the automotive converter topology due to its advantages regarding filter reduction, dynamic response, and power management. Presented herein, is a model based on one kilowatt interleaved six–phase buck converter designed to operate in a Discontinuous Conduction Mode (DCM). The control strategy of the converter is based on a voltage–mode–controlled Pulse Width Modulation (PWM) with a Proportional–Integral–Derivative (PID). The effectiveness of the interleaved step–down converter is verified through simulation using control–oriented simulator, MatLab\Simulink.<\div>

۲An Improved Interleaved Boost Converter with High Voltage Gain and Reduced Switching Losses for Photovoltaic Panels
اطلاعات انتشار: پنجمین کنفرانس بین المللی رویکردهای نوین در نگهداشت انرژی، سال
تعداد صفحات: ۱۰
In this paper, an improved structure for interleaved boost converter is proposed for photovoltaic applications. The proposed topology comprises of four stages of boost converter connected in parallel along with two voltage multiplier converters at the output side. The proposed topology can substantially increase the level of generated voltage by PV panel which is an important advantage of proposed structure. To control the switches of proposed topology, pulse–width modulation technique is used. It is important to note that the high voltage gain of presented structure is obtained for lower values of the duty cycle of switches. It causes the voltage and current stress on the used switches to be reduced. To extract maximum power from PV panel, the switches of proposed topology is controlled using perturb & observe (P&O) algorithm. All mathematical analysis on the proposed topology consisting of voltage stress on switches, diodes and voltage gain are provided. To verify the performance and theoretical analysis of the proposed structure, simulation results are presented using PSCAD\EMTDC software. It is shown that both theoretical and simulation analysis are in complete agreement to each other.<\div>

نویسنده(ها): ، ،
اطلاعات انتشار: Iranian Journal of Science and Technology Transactions of Electrical Engineering، سي و هشتم،شماره۲، ۲۰۱۴، سال
تعداد صفحات: ۱۵
Analog–to–Digital Converters (ADCs) represent a main bottleneck for realizing highspeed telecommunication systems such as cognitive radio and Software–Defined Radio (SDR) systems in addition to various requirements of transmission quality. Time–interleaved A–D converter (TI–ADC) may be considered as an effective candidate to achieve high–speed ADC with relatively slow circuits accounting for digital spectrum management. However, mismatch errors cause a considerable degradation in the performance of TI–ADC. In this paper an adaptive compensation technique is proposed for improving the overall performance in presence of offset and gain mismatches. The proposed structure behaves independent from input signal. Here, Least– Mean–Squares (LMS) algorithm has been exploited to adaptively estimate and correct mismatch errors. The Proposed correction method is structurally very simple and hence suitable for implementation on integrated circuits. Besides, proposed digital compensation algorithm is computationally efficient. Considering a four–channel TI–ADC, the proposed compensated TIADC provides an approximate improvement of 33.2dB in the performance compared to uncompensated architecture. The proposed compensated TI–ADC would be an efficient high speed ADC in most RF communication applications, and especially applications that deal with tuned frequency.
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